I-Spector PSD — FPGA firmware

This is the firmware of the FPGA on the acquisition (MCA) board of the I-Spector PSD spectrometer. The FPGA is an Intel MAX10. It processes the detector signal in real time and produces three results:

• the energy spectrum (1024 channels);
• the PSD map (128 x 128): energy against pulse shape, to separate neutrons from gammas;
• oscilloscope waveforms, to check and tune the settings.

The instrument's microcontroller configures the FPGA and reads its results. You see them in the web interface and in Scintilla.

What the firmware does

Every detector pulse goes through the chain below. The names in italics are the settings on the MCA settings panel of the web interface.

 ADC (2 x 12 bit, 125 MS/s)
   │
   ▼
 Input stage ──► Trigger ──► Pre-integration delay ──► Baseline restorer
                                                             │
                   ┌─────────────────────────────────────────┤
                   ▼                                         ▼
            Energy integration                     PSD integration + peak
                   │                                         │
                   ▼                                         ▼
            Pile-up rejection ───────────────────► PSD = tail charge / peak
                   │                                         │
                   ▼                                         ▼
            Energy spectrum (1024 ch)            PSD map (128 x 128)

Input stage

The detector signal is sampled by two ADC channels at 125 MS/s (one sample every 8 ns). The FPGA inverts the samples so that pulses are positive, and adds the two channels together. At power-up it configures the ADC by itself.

Trigger

A derivative trigger detects the rising edge of each pulse. A slow change of the baseline does not trigger it.

• Threshold: the trigger level.
• Post-trigger inhibit: the time after a trigger during which no new trigger is accepted.

Pre-integration

The signal is delayed so that integration starts slightly before the trigger, and the leading edge of the pulse is included.

• Pre-integration: that delay.

Baseline restorer

A moving average of the signal between pulses gives the baseline, which is subtracted from every sample. During a pulse the baseline is frozen, so the pulse does not shift it.

• Length: the number of samples averaged.
• Inhibition: how long the baseline stays frozen after a trigger.

Energy

The pulse, minus the baseline, is integrated over a fixed window, and the result is scaled. The energy is the channel of the spectrum, 0 to 1023. Energies above the last channel go into channel 1023. Pulses with a negative integral are discarded.

• Integration: the length of the window.
• Gain: the scale factor.

Pulse shape discrimination (PSD)

During the same pulse the FPGA also measures:

• the peak amplitude of the pulse;
• the tail charge: the integral of a second window that starts later in the pulse.

The PSD value is the tail charge divided by the peak, scaled by the PSD gain. Pulses with a slower decay, typically neutrons in a PSD scintillator, have a larger PSD value than gammas. The PSD value sets the row of the PSD map. Values above the last row go into the last row.

• PSD Delay: where the second window starts.
• PSD Integration: the length of the second window.
• PSD Gain: the scale factor of the PSD value.

Pile-up rejection

If a second trigger arrives while a pulse is being integrated, the two pulses overlap. Both are discarded, and the counting stops until the signal has been quiet for a while. The time spent in pile-up is not counted as live time.

• Inhibition: how long the signal must be quiet before counting starts again.
• Penalty: an extra dead time after every processed pulse and after every pile-up, before a new pulse is accepted.

Energy spectrum

The spectrum has 1024 channels, with up to 16.7 million counts each. An acquisition can run:

• until it is stopped (Free Run);
• for a preset real time (Time);
• for a preset number of counts (Counts).

PSD map

The map is 128 x 128 cells, with up to 65535 counts each:

• the horizontal axis is energy, 128 bins; each bin groups 8 channels of the spectrum;
• the vertical axis is the PSD value, 128 bins.

It is filled together with the spectrum, and reset and stopped with it.

Counters

The FPGA counts continuously; the rates are updated once a second:

Oscilloscope

The oscilloscope captures 1024 samples of the signal after the baseline restorer. With them it records six digital traces, which show what the FPGA is doing:

Time scale sets the length of the capture, from 8 µs to 32 ms.

Remote update

The FPGA flash holds two images:

• image 0, a small update loader;
• image 1, this firmware.

At power-up the microcontroller starts image 1. To update the FPGA, the microcontroller rewrites image 1 through the loader. The loader itself is never overwritten, so a failed or interrupted update can always be repeated.

Version

The instrument shows the FPGA firmware version on the Configuration page of the web interface, as MCA / PSD firmware, for example 26.9.28.2 (26.9.28.0):

• the first number is the version, the date of the release (YY.M.D.N, where N is the release of that day);
• the number in brackets is the build date.

Files

Each release publishes these files. <version> is the release, for example 2026.9.28.2.

Updating the FPGA

1. Open the web interface of the instrument and go to the Firmware page.
2. In the FPGA firmware card, select the ispector-fpga-psd-<version>.rpd file and start the update.
3. Wait until the state is ok. The update takes several minutes, and the acquisition board is power-cycled during it. Do not switch the instrument off before the end.
4. Check the new version on the Configuration page.

All settings are kept. The microcontroller writes them to the FPGA again as soon as it restarts.

Use only the PSD files on an I-Spector PSD. The MCA instruments have a different FPGA firmware.